Active matrix substrates that are used for liquid crystal display devices or the like include a switching element for each pixel, e.g., a thin film transistor (hereinafter “TFT”). As such switching elements, TFTs whose active layer is an amorphous silicon film (hereinafter “amorphous silicon TFTs”) and TFTs whose active layer is a polycrystalline silicon film (hereinafter “polycrystalline silicon TFTs”) have been widely used.
In the recent years, it has been proposed to use an oxide semiconductor as the material of the active layers of TFTs, instead of an amorphous silicon or a polycrystalline silicon. These TFTs are called “oxide semiconductor TFTs”. An oxide semiconductor provides a higher mobility than does an amorphous silicon. Therefore, oxide semiconductor TFTs can operate more rapidly than amorphous silicon TFTs. Moreover, an oxide semiconductor film is formed through a simple process as compared to a polycrystalline silicon film, and therefore is applicable to devices which require a large geometric area.
As oxide semiconductor TFTs, there have been proposed TFTs having a bottom-gate structure and having source and drain electrodes provided on an oxide semiconductor layer (top-contact). In this kind of structure, the source and drain electrodes are formed by etching an electrically conductive film that is formed on the oxide semiconductor layer. This structure, in which the surface portion of the oxide semiconductor layer also receives etching, is called a channel etching type. On the other hand, there has also been proposed a structure which involves forming, in an etching step for forming the source and drain electrodes, a dielectric film (etchstop film) above the channel of the oxide semiconductor layer, the dielectric film functioning as an etchstop to prevent the channel from being etched. The structure featuring an etchstop film provided above the channel is called an etching stop type. In the present specification, in abbreviation, a channel etching type TFT will be referred to as a “CE-type TFT”, and an etching stop type TFT as an “ES-type TFT”.
ES-type TFTs are disclosed in Patent Documents 1 and 2, for example. Patent Document 1 discloses forming an oxide semiconductor layer and an etchstop film through a patterning by using the same mask. The etchstop film has a source aperture and a drain aperture through which the source and drain electrodes are connected to the oxide semiconductor layer. Patent Document 2 discloses forming an interlevel dielectric (etchstop film) so as to cover an oxide semiconductor layer, and making a source aperture and a drain aperture in the etchstop film.
FIG. 8 is a cross-sectional view showing the ES-type TFT which is disclosed in Patent Document 2. The ES-type TFT includes a substrate 1, a gate electrode 3 provided on the substrate 1, a gate dielectric layer 5 covering the gate electrode 3, an oxide semiconductor layer 7 formed on the gate dielectric layer 5, an interlevel dielectric (etchstop film) 90 covering the oxide semiconductor layer 7, and a source electrode 11 and a drain electrode 13 provided on the oxide semiconductor layer 7. The source electrode 11 and the drain electrode 13 are electrically connected to the oxide semiconductor layer 7 respectively through a source aperture 91 and a drain aperture 92, which are made in the etchstop film 90.